Layout Design Engineer

at  Untether AI

Remote, British Columbia, Canada -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate26 Nov, 2024Not Specified31 Aug, 20245 year(s) or aboveCadence Virtuoso,Unix,Sram,Interpreting,Cad Tools,Linux,FusionNoNo
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Description:

PLEASE NOTE: WHILE OUR ENGINEERING HQ IS IN TORONTO, THIS IS A REMOTE OPPORTUNITY AND WE WELCOME APPLICANTS FROM ANYWHERE IN NORTH AMERICA.

We’re looking for best in class engineers to join our existing top-notch team. When you join Untether AI, you will be part of the team that creates innovative hardware and delivers industry leading AI performance and efficiency. Utilizing non Von Neumann techniques, you will help propel sustainable AI inference.
As part of this talented team of engineers, you are able to - and are excited to - architect, implement, verify and productize custom hardware designs. Being on our team means collaborating with an extremely bright group of people while tackling tough and interesting problems at the intersection of AI and hardware.
We are looking to add a Staff Layout Design Engineer to our team to develop cutting edge custom memory and custom digital layouts. The desired candidate would have previous exposure to low-power SRAM design and familiarity with finFET design rules, layout dependent effects, and DFM. Tasks include creation of layout through LVS, DRC, ERC, SRAM checks, power domains and distribution. Experience with place and route tools is a plus.

REQUIREMENTS

  • 5+ years of experience in 7nm and smaller finFET nodes
  • Expertise in using industry standard CAD tools such as Cadence Virtuoso
  • Experience with closing LVS, DRC, ERC, SRAM, other PVERF checks on custom designs
  • Understanding of EMIR and mitigations
  • Linux or Unix

PREFERRED SKILLS & EXPERIENCE

  • Experience in digital place and route tools such as Innovus or Fusion Compiler
  • Expertise with either Redhawk/Totem or Voltus and interpreting results
  • Skill, TCL, python scripting is a plus

Responsibilities:

RESPONSIBILITIES

  • Collaborate with circuit designers to understand electrical and physical needs of complex custom memory array designs
  • Design custom standard cell compliant transistor level layout meeting strenuous PPA goals
  • Drive learning and optimization for physical effects of process variation

WHAT ARE SOME OF THE PERKS THAT YOU WILL RECEIVE BEING PART OF UNTETHER AI? ALIGNED TO UNTETHER’S PHILOSOPHY, OUR EMPLOYEES ENJOY THE SAME PERKS, REGARDLESS OF ROLE OR LEVEL. IN PART, THESE INCLUDE:

  • 20 vacation days
  • Strong health and extended health benefits
  • Unlimited sick days
  • Stock options
  • Building chips and software that will change the world


REQUIREMENT SUMMARY

Min:5.0Max:10.0 year(s)

Electrical/Electronic Manufacturing

Engineering Design / R&D

Other

Graduate

Proficient

1

Remote, Canada