Master thesis: Deployment of PDL flow within the IC design development (m/d/f)

at  amsOSRAM AG

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• As an internship preform a master thesis with the requirement management tracking verification using PDL standard with Pytest and Codebamer tool as requirement management platform, this to support and fill the existing gap within the verification, validation, and test teams and to keep continuity on supporting demands from the R&D design team.
• Develop validation environment based on PXI/NI HW using Python and Pytest Module
• Contribute to innovative test environment solutions closing the loop between requirement and implementations, (look closer if there is a way to reused and combine the test flow with the design verification environment.
• Perform the design validation for confirmation of functionality of analog and digital design blocks.
• Analyze functionality and parameters of prototype ICs in close cooperation with design engineers.
• PCB HW design, and debugging of HW, ability of soldering / desoldering .
• Contribute to the growth of the team, help junior / younger engineers learn required knowledge and experience through projects work
• Good knowledge of Python script development, experience with Pytest module is Plus.
• are eager to build a deep understanding of Analog and digital circuit design ( V&V)
• Master’s Degree student in Electrical and Electronics or Computer Engineering or equivalent.
• know analog and Digital Design Basics (Virtuoso, Cadence schematic Verilog, VHDL) is a Plus.
• having and hands-on experience in firmware development is a Plus.
• enjoy working in an international environment and are eager to learn new things.
• Good communication skills in oral and written English.

Who we are looking for

• Good knowledge of Python script development, experience with Pytest module is Plus.
• are eager to build a deep understanding of Analog and digital circuit design ( V&V)
• Master’s Degree student in Electrical and Electronics or Computer Engineering or equivalent.
• know analog and Digital Design Basics (Virtuoso, Cadence schematic Verilog, VHDL) is a Plus.
• having and hands-on experience in firmware development is a Plus.
• enjoy working in an international environment and are eager to learn new things.
• Good communication skills in oral and written English.

Please contact Yong Pan for further information via yong.pan@ams-osram.com or +43 (3136) 50032660

Please refer the Job description for details