Mixed-Signal Design Verification Engineer - Power Management (m/f/d)

at  Apple

München, Bayern, Germany -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate18 Feb, 2025Not Specified19 Nov, 2024N/AVerilog,Circuit,Tcl,Scripting Languages,Verilog Ams,Modeling,Perl,Assertion Based Verification,Power Management,Interpersonal Skills,PythonNoNo
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Description:

SUMMARY

Posted: Oct 15, 2024
Role Number:200573357
At Apple, we don’t just build great products - we revolutionize industries. It’s the diversity of our people and their ideas that drive the innovation to fuel everything we do, from amazing technology to industry-leading environmental efforts. Join Apple and be a part of our success! The Silicon Engineering Group is responsible for developing innovative chips that can be found in all of your favourite Apple products. Our power management design team in Munich has an outstanding opportunity for a forward-thinking and creative Mixed-Signal Design Verification Engineer. In this role, you will have the opportunity to experience a PMU from several levels of abstractions. Whether your passion is in the intricate details of how a sub-block within the PMU works, or the high level abstraction of system level use-cases and emulations, you will find your passion in your day-to-day business. You will be working closely with multi-functional teams to design and implement verification plans to meet specification requirements and project schedule.

DESCRIPTION

You will closely collaborate and engage with members of different teams including design teams, digital verification, system engineers and architects, and DfT teams to define and implement the verification strategy and test plan to cover a specified feature or IP. Your tasks would include: - Development of test plans covering the specified feature set and related checks and assertions - Design verification from interactive test case debugging to automated regression - Analysing verification results and debugging the design - Develop analog behavioral models with different abstraction levels based on required verification targets - Planning and reviewing the verification results with other teams - Collaborating with design and DV teams targeting optimum verification coverage - Construction of verification and modeling environment using innovative methods - Verification automation

  • MSc or equivalent experience in Electrical Engineering or industrial experience equivalent
  • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

PREFERRED QUALIFICATIONS

  • Experience in analog and mixed-signal verification and circuit modeling
  • Understanding of analog schematics and digital RTL to support and analyse verification results
  • Understanding of behavioral modeling and model validation techniques
  • Knowledge of Verilog-AMS, Verilog, System-Verilog, and UVM
  • Hands-on experience with Assertion Based Verification
  • Knowledge of verification automation concepts and scripting languages: Python, Perl, TCL is an advantage
  • Proactive with excellent interpersonal skills able to collaborate with diverse multi-functional teams
  • Background in power management is a plus

Responsibilities:

  • MSc or equivalent experience in Electrical Engineering or industrial experience equivalent
  • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants


REQUIREMENT SUMMARY

Min:N/AMax:5.0 year(s)

Information Technology/IT

Engineering Design / R&D

Software Engineering

MSc

Electrical, Electrical Engineering, Engineering

Proficient

1

München, Germany