Pcie Design Verification Engineer

at  AMD

Job Description

PREFERRED EXPERIENCE:

Digital Design in RTL, Verilog HDL
Testbench Architecture, System Verilog, UVM
C/C++, Java, or other object-oriented programming language
Perl, Ruby, Shell-scripting, UNIX/LINUX Environment
VCS, NCSIM, Questa, or other simulator and associated waveform viewers such as Verdi
PC System Architecture: PCI Express, x86, ARM
On-Chip Bus Interfaces and Architectures: AMBA AXI, OCP, PIPE

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_

THE ROLE:

AMD is looking for motivated individuals seeking opportunities to solve complex problems in a fast-paced work environment. The successful candidate will be involved in all aspects of AMD’s next generation products. This includes verifying PCI Express designs using latest UVM standard and develop comprehensive test plan to ensure coverage closure. Candidate will also apply low power verification methodology and measure overall system performance of our IP. The position allows exposure to all aspect of ASIC design stages. AMD employee contributions are at the core of our technology solutions. Interested about transforming the world?

KEY RESPONSIBILITIES:

Writing/Implementing/Reviewing Test Plans
Developing Testbenches and Verification Components such as UVCs, models, BFMs, and Re-usable Verification Environments
Writing, Modifying, and Maintaining Random and Directed Test Cases and Libraries in System Verilog/UVM
Analyzing Functional, Code, and Test Plan Coverage
Implementing Assertions, Checkers, and Monitors
Utilizing In-House and 3rd Party IP/SOC CAD and EDA Tools for Design Verification
Deploying Industry-Leading Verification Methodologies such as UVM and Formal Verification
Triaging and Debugging Regressions
Reproducing Functional Bugs found in Silicon in Simulation Verification tools
Conducting and participating in Code Reviews
Technical leadership is an asset, including driving projects from start to the finish and Design verification sign-off