PMU Design Verification Intern (m/f/d)

at  Apple

SUMMARY

Posted: Sep 4, 2024
Role Number:200566298
At Apple we believe our products begin with our people. By hiring a team with dynamic strengths, we drive creative thought. By giving that team everything they need, we drive innovation. By hiring incredible engineers, we drive precision. Through our process, we build memorable experiences for our customers. These elements come together to make Apple an amazing environment for motivated people to do the greatest work of their lives. You will become part of a hands-on development team that cultivates excellence, creativity and innovation. Will you help us design the next generation of revolutionary Apple products? The Power Management team is seeking a forward-thinking and creative Design Verification Intern. In this role, you will be taking part in the design of UVM-based test-benches for power management units.

DESCRIPTION

• Responsible for ensuring the quality of the work and is expected to: Work closely with the teams to understand and design the verification components in SystemVerilog/UVM. -Have collaborative approaches to design self-checking tests for the current design under development. - Generate scripts for verification automation

• Enrolled in Bachelor’s, Master’s or PhD program in EE or related field

• Fluent English skillsAvailable for 6 months or more

PREFERRED QUALIFICATIONS

• Knowledge of object oriented programming
• Knowledge of Verilog/SystemVerilog
• Scripting language knowledge (perl/python)
• Should be a teammate with excellent written and verbal communication skills and have the desire to tackle diverse challenges with international teams

• Enrolled in Bachelor’s, Master’s or PhD program in EE or related field
• Fluent English skillsAvailable for 6 months or mor