R&D Engineer, Principal

at  Synopsys

Dublin, County Dublin, Ireland -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate18 Jan, 2025Not Specified19 Oct, 202410 year(s) or aboveCommunication Skills,Python,Layout Design,Simulations,Machine Learning,It,Ddr,Serdes,Design Flow,Modeling,Tcl,Languages,Perl,AutomationNoNo
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Description:

We are looking for an R&D Principle to join a growing, dynamic and multi-cultural CAD software and methodology team.
We need people who are able to work in multi-functional teams, capable of developing specifications for IC layout productivity tools, come up with creative solutions, are reliable in following existing procedures but have a critical viewpoint and can tradeoff the optimal with the best on a daily basis.

QUALIFICATIONS:

  • MSEE (or PhD) with 10+ of experience
  • Extensive knowledge of Analog & Mixed-Signal layout design
  • Proficiency with CustomCompiler, StarRC and ICV layout design and verification tools
  • Proficiency with spice simulators including HSPICE, PrimeSim/FineSim and PrimeWave
  • Extensive programming skills in languages such as Python, Perl, TCL
  • Ability to provide automation for rapid and dynamic design needs is highly sought-after
  • Direct design experience in high speed PHY such as SERDES, DDR or HBM is a strong plus
  • Must be a team player with good written and verbal communication skills, self-motivated, thorough design styles, detail oriented, and work with multiple functional teams with good engineering practices
  • Candidate with Machine Learning paradigms/techniques understandings with knowledge of applying it in modeling, circuit design flow & simulations is desirable
  • Ability to setup workgroups/teams to achieve best efficiency in driving goals and activities

Responsibilities:

Please refer the Job description for details


REQUIREMENT SUMMARY

Min:10.0Max:15.0 year(s)

Information Technology/IT

Engineering Design / R&D

Software Engineering

Graduate

Proficient

1

Dublin, County Dublin, Ireland