Research Associate for the Verification of RISC-V Architectures in System-o

at  FriedrichAlexanderUniversitt ErlangenNrnberg

Your workplace
The Institute of Information Technology at the Faculty of Engineering of Friedrich-Alexander-University Erlangen-Nürnberg (FAU) specializes in the design of digital circuits and is one of the leading institutions in this field. Here, innovative approaches and methods are developed to create efficient and high-performance digital systems. The institute places great emphasis on practical research and promotes collaboration with industry to ensure the transfer of knowledge and technologies. The close cooperation with the Fraunhofer Institute for Integrated Circuits IIS provides doctoral candidates with unique opportunities to extend their research activities beyond the purely academic context and gain practical experience in the industry. With modern laboratories and highly qualified professionals, the institute provides optimal conditions for students and researchers to develop cutting-edge solutions in the field of digital circuit technology.

Our benefits

• Regular promotion to the next level and increase in salary pursuant to the collective bargaining agreement for the public service of the German Länder (TV-L) or remuneration pursuant to the Bavarian Public Servants Remuneration Act (BayBesG) plus an additional annual bonus
• 30 days annual leave at five working days per week with additional free days on December 24 and 31
• Occupational pension scheme and asset accumulation savings scheme
• Excellent support during the academic qualification phase
• Systematic career development in collaboration with the Graduate Center
• Thorough onboarding process with a dedicated team
• Joint team activities
• Subsidized food and drinks in our student restaurants
• Place of work within comfortable walking distance of public transport
• Family-friendly environment with childcare options, also during school holidays
• Flexible working hours
• A wide range of training courses and opportunities for professional development
• Active health management

Your Tasks

• Methods and strategies for efficient functional and formal digital verification with UVM, including the emulation of digital System-on-Chip (SoC) with RISC-V and mixed-signal IP
• Expansion of collaboration with the Fraunhofer IIS for integrated digital systems
• Publication and presentation of research results
• Supervision of Bachelor’s and Master’s theses, as well as conducting teaching exercises, seminars, or computer labs

Your Profile

• Completed academic degree (Master’s/Diploma) in digital circuit technology or a related field
• Good knowledge of SystemVerilog and/or VHDL as well as FPGAs
• Excellent English skills (minimum C2 level)

Supplementary description
There is an opportunity for a doctoral degree in the field of Digital System-on-Chip Design.
Application deadline
2024-11-14
Title
Research Associate for the Verification of RISC-V Architectures in System-on-Chip (SoC) Designs (m/f/d)
Job start date
2025-01-15
Payment
E13
Working time
full time
Weekly working hours
40,00
Temporary Contract
yes
Period of Temporary Contract
36 Months
Further general conditions
Work location
Am Wolfsmantel 33
91058 Erlangen
Contact
Jürgen Frickel
Tel.: +49 9131 8525109

• Methods and strategies for efficient functional and formal digital verification with UVM, including the emulation of digital System-on-Chip (SoC) with RISC-V and mixed-signal IP
• Expansion of collaboration with the Fraunhofer IIS for integrated digital systems
• Publication and presentation of research results
• Supervision of Bachelor’s and Master’s theses, as well as conducting teaching exercises, seminars, or computer lab