Research Associate in Brain-inspired Learning Accelerators

at  Kings College London

Job id: 095225. Salary: £43,205 - £47,732 per annum, including London Weighting Allowance.
Posted: 17 September 2024. Closing date: 22 September 2024.
Business unit: Natural, Mathematical & Engineering Sci. Department: Engineering.
Contact details: Professor Bipin Rajendran. bipin.rajendran@kcl.ac.uk
Location: Strand Campus. Category: Research.
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About us
Recently re-founded, the Department of Engineering is rapidly expanding into a world-class research and teaching department. Research currently focuses on information processing systems, robotics, telecommunications, and biomedical engineering, but we are looking to establish new research themes.
This post will be affiliated with the newly established Centre for Intelligent Information Processing Systems within the department.
About the role
The Centre for Intelligent Information Processing Systems (CIIPS) led by Professor Bipin Rajendran and Professor Osvaldo Simeone brings together interdisciplinary and diverse expertise synergistically to address future challenges in intelligent information systems, encompassing hardware-software co-design, nanoscale information systems, signal processing, information engineering, and quantum information processing.
We are seeking a highly motivated and conscientious post-doctoral researcher to work on a project that involves the research, design, implement and validate the energy-efficient Spiking Neural Network architecture that leverages computing-in-memory principles.
The project will develop a low-power Neuromorphic Compute-in-Memory (CIM) ASIC prototype in nano-scale advanced CMOS technology based on spiking neural networks (SNNs) for both learning and inference for enhanced efficiency and reconfigurability.
You will contribute to the architecture, design and implementation of the key components of the neuro-CIM that tightly integrates the CIM macros, spiking encoder, digital memory, top-controller, and peripheral interface to meet the energy, area, precision, and latency constraints.
The project will also involve the use of FPGA-based measurement and validation environment for the CIM processor system for benchmarking its accuracy and energy efficiency performances on various large datasets. You will also have the opportunity to mentor PhD and MSc students working in the group.
Please note that this is a PhD level role but candidates who are nearing completion of their PhD will be considered. Should the successful candidate be awaiting the award of their PhD, the appointment will be made at Grade 5, spinal point 30 with the title of Research Assistant until confirmation of the award of the PhD has been received. Upon confirmation of the award of the PhD, the job title will become Research Associate and the salary will increase to Grade 6, spine point 31.
This is a full time contract, earliest start date 1st of October 2024 and you will be offered a fixed term contract for 12 months, with the possibility of extension.
About you
To be successful in this role, we are looking for candidates to have the following skills and experience:
Essential criteria
1. PhD awarded (or near completion) in Electronic or Computer Engineering.
2. Strong background and experience in Analog/Mixed Signal Integrated Circuit (IC) design, including HDL (Verilog, VHDL) and scripting languages
3. Research experience in hardware accelerator design for state-of-the-art AI models such as Transformers, Neuromorphic and Probabilistic Networks.
4. Knowledge of commercial EDA tools (such as Cadence, Synopsys, or Mentor Graphics).
5. Effective communication (oral and written) skills, ability to write research reports and papers in style accessible to academic audiences.
6. Track record of high-quality research publications in peer reviewed conferences and/or journals.
7. Ability to work independently and as part of a team on research programmes.
Desirable criteria
1. Experience with hardware aware optimization of state-of-the-art machine learning models.
2. Experience with Low-power IC design and neuromorphic architectures.
Downloading a copy of our Job Description
Full details of the role and the skills, knowledge and experience required can be found in the Job Description document, provided at the bottom of the next page after you click “

Please refer the Job description for details