Senior Analog IC Layout Design Engineer (16nm or below)

at  SUNLUNE SINGAPORE PTE LTD

Singapore, Southeast, Singapore -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate13 Oct, 2024USD 8500 Monthly14 Jul, 20245 year(s) or aboveCommunication Skills,Design Skills,Ic Layout,Circuit DesignNoNo
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Description:

QUALIFICATIONS

  • BSEE or higher required
  • 5+ years industry experience required
  • Strong analog layout design skills
  • Expert-level knowledge with Cadence Virtuoso tool suite
  • Expert-level knowledge with Mentor Graphics Calibre
  • Strong experience in advanced node IC layout. Knowing GAA is preferred.
  • Able to work independently on challenging problems
  • Understand layout considerations for device matching, coupling and noise isolation
  • Excellent communication skills (both oral and written) arerequired
  • Able to study custom circuit simulation/characterize library/custom circuit design for future work. Having one of those capability is preferred

Responsibilities:

  • Work with IC designers and chip leads to architect, design and optimize custom layout of standard cells.
  • Layout design of analog circuit blocks with attention to matching and minimizing parasitics in the layout.
  • Physical Verification using DRC, ERC and LVS.

REQUIREMENT SUMMARY

Min:5.0Max:10.0 year(s)

Information Technology/IT

Engineering Design / R&D

Information Technology

Graduate

Proficient

1

Singapore, Singapore