Senior CPU Compiler Engineer

at  Imagination Technologies

WHO WE ARE

At Imagination, we love innovating. We spend our time creating the graphics and AI chips that are at the core of your favourite electronic products, and we are expanding our IP portfolio to include RISC-V CPUs as part of our efforts to create the best Compute offering in the market. We have a no-compromise approach to making our technology as high performance and power-efficient as possible, all while being squeezed into the smallest space possible.
It’s this relentless drive to push the boundaries of what’s possible that has led to Imagination powering more than 10 billion of the world’s most iconic electronic devices, from smartphones to smart TVs, from drones to self-driving cars.
We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before.

The role is part of CPU Compiler team, where teams develop and maintain RISC-V toolchains, not only for Imagination-specific processors and platforms, but also for the wider open-source ecosystem to ensure optimised support for this exciting and disruptive architecture. As an experienced compiler engineer, you will be working in a dynamic environment, interacting both with your own team and with several of Imagination’s other engineering teams (including hardware and software). There is also scope for external collaboration as we coordinate work with other organisations around the world who share our interest in RISC-V’s success.

You will:

• Design and maintain toolchains in one or more of the following areas:
• Bare-metal toolchains with target-specific startup code and libraries
• Linux toolchains, including support for teams building operating system images
• Explore and implement machine learning requirements on compiler or toolchain side, e.g.
• Leverage MLIR for custom instruction lowering
• Improve support for SYCL
• Use emulators and real hardware to analyse and optimise compiler, e.g. by using RISC-V’s vector instructions
• Enhance or implement optimization passes in LLVM to improve target benchmarks
• Write clean, efficient and maintainable code while adhering to best practices and coding standards
• Perform thorough testing and debugging of RISC-V software
• Document code, algorithms, and processes to facilitate knowledge sharing and collaboration within the team