Senior DDQA NAND Backend of Line Reliability Engineer

at  Micron

Singapore, Southeast, Singapore -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate30 Oct, 2024Not Specified07 Aug, 20243 year(s) or aboveWafer Fab,Communication Skills,Product Quality,Root,English,Dielectrics,Electromigration,Customer Satisfaction,Risk Assessment,Physics,Chemistry,Meeting CommitmentsNoNo
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Description:

OUR VISION IS TO TRANSFORM HOW THE WORLD USES INFORMATION TO ENRICH LIFE FOR ALL.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.
JR57807 Senior DDQA NAND Backend of Line Reliability Engineer

JOB DESCRIPTION:

As a Senior DDQA (Development and Design Quality Assurance) Backend of Line Reliability Engineer, you will be primarily responsible for developing and optimizing quality and reliability criteria related to Metal Interconnects and Wafer-to-Wafer Bonding process for the next generation of Micron’s memory parts. You will also be required to identify, diagnose, and resolve BEOL metal interconnects and W2W bonding assembly process related problems by applying failure analysis, FMEA or 8D methodology. In this position, you will be working in a highly collaborative atmosphere, interacting with various groups such as Technology Development (TD), Process Integration, electrical and physical failure analysis, Product Engineering, Quality Reliability Assurance Team to develop product that meets Quality and Reliability specs and requirements.

MINIMUM QUALIFICATIONS:

  • 3+ years’ experience in semiconductor related engineering, preferably in 300mm wafer fab.
  • Hands-on experience on Backend of Line Metal Interconnects process (Cu, Al, TSV, Dielectrics) or Metal Reliability testing (electromigration, High Temperature Storage etc) is a requirement.
  • Knowledge or exposure in Wafer-to-Wafer Bonding technology and failure mode is a strong plus.
  • Must possess engineering knowledge of semiconductor processes. Knowledge of NAND Fab processes, flow and fail modes is preferred.
  • Highly skilled at problem-solving activity and capability of leading cross functional team.
  • Understanding on technical risk assessment, FMEA, and 8D methodology for root cause analysis and problem solving.
  • Effective verbal and written communication skills in English.
  • Good multitasking skills and ability to set priorities in a fast moving, dynamic environment.
  • Ability to work independently, with minimal direction, and a focus on meeting commitments.
  • Real passion for improving product quality to increase customer satisfaction.

EDUCATION AND EXPERIENCE.

  • Bachelor’s degree or higher in electrical or electronics engineering, physics, chemistry, mechanical engineering, material science, or other applied engineering discipline.

Responsibilities:

  • Define & implement Reliability test methodology for new Metal Interconnects and Wafer-to-Wafer Bonding process for the next generation of Micron’s memory parts.
  • Drive dielectric and Wafer-to-Wafer (W2W) Bonding technology roadmaps from Product Quality and Reliability perspective.
  • Ensure Package Level and Wafer Level process Reliability Qualification standards are compliant with JEDEC standards.
  • Collaborate with TD to define the BEOL reliability strategy based on the Process Roadmap.
  • Provides BEOL process Reliability analysis and risk assessment to Global Quality (GQ) Leadership and Fab Management.
  • Support technology transfer to production facilities (some international travel may be required).
  • Partner with multiple stakeholders in Process Conversion Review Board Meeting (PCRB) to improve coverage from various aspects of product quality and reliability and prevent post qual escapes or excursion triggered by conversion.
  • Identify gaps and drive initiatives/programs/business process to build margin around structural, electrical, and reliability performance.
  • Partner with TD on latest products and technologies related to BEOL metal interconnects and Wafer-to-Wafer Bonding processes and define quality and reliability fail modes especially NUDD (New, Unique, Different, Difficult) with goal to mitigate risk and achieve high quality materials.
  • Build Product Fail Modes Repository based on NUDD (proactive) and previous issues (reactive), and work with key stakeholder to prevent issues or implement effective detections controls and containment.
  • Deliver a new Product Fail Modes Repository and their Effective Detection Controls and Containment Document to meet technology development and Transfer timeline.
  • Partner with Manufacturing (MFG) or Central Quality teams on current high-volume products to sustain and further develop the Product Fail Modes Repository through regular refresh meeting.


REQUIREMENT SUMMARY

Min:3.0Max:8.0 year(s)

Electrical/Electronic Manufacturing

Production / Maintenance / Quality

Software Engineering

Graduate

Electrical or electronics engineering physics chemistry mechanical engineering material science or other applied engineering discipline

Proficient

1

Singapore, Singapore