Senior Digital IC Verification Engineer

at  Demant

• Join our Innovative Chipset Team!
  Are you passionate about microelectronics and eager to contribute to the development of advanced solutions that positively impact millions of people worldwide? If so, we invite you to seize this exciting opportunity by sending us your CV.
  Welcome to Chipset, a key division of our Research and Development department. Our expertise lies in the development of advanced chipsets for our widely recognized hearing devices and related accessories. Our consistent pursuit of technological excellence enables us to deliver professional-grade solutions in DSP processing, audio quality, connectivity, AI integration, and re-chargeability - all in compact form factors with minimal power consumption.

INTERPERSONAL AND COMMUNICATION SKILLS

We are seeking a proactive individual who thrives on teamwork and collaboration to achieve outstanding results. You have good interpersonal and communication skills and experience of working with business stakeholders. You have a bachelor’s, master’s or PhD degree in electronics/IC design and some years of experience from a similar role.

As a senior verification engineer, you will have experience with:

• Verification methodologies and languages such as SystemVerilog / UVM
• Formal verification such as VC Formal
• Solid hands-on RTL design skills in VHDL or Verilog
• HDL simulators and viewers like VCS, DVE, Verdi, Incisive
• Verification using C/C++/Matlab models
• A great passion for quality, understanding the importance of verification
• Flow automation scripts using Perl/Python, Tcl, Make and shell scripts

If you are excited by the prospect of shaping the future of digital IC engineering, we encourage you to join us on our mission to enhance the lives of millions through advanced technology.

• Development of verification plans & test cases
• Implementation of random test generators, monitors, high level transactional models
• Implementing and maintaining the verification flow
• Digital simulation using HDL
• Formal verification
• Collection and analysis of test coverag