Senior DRAM Design Layout Engineer

at  Micron

Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
The prospective teammate will be responsible for ensuring that all engineering and process-related criteria/standards needed for an assigned DRAM product are met. They will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. This role requires collaboration with our extraordinary DRAM Design group and our other engineering groups to apply multiple layout techniques to design and verify digital and analog circuits. Lastly, our teammate will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape-out processes and procedures.

What’s Encouraged Daily:

• BE/BTech or MTech in Electronic/VLSI Engineering or equivalent
• Responsible for the design and development of analog layouts used in DRAM chips.
• Perform layout verification like LVS/DRC/EM, quality check, and documentation.

• Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership Skills in planning, area/time estimation, scheduling, delegation, and execution to meet project schedules/landmarks in multiple project environments.

• Lead junior team-members in their execution of Sub sub-block-level layouts & review their work.
• Contribute to effective project management and technical innovation

• Plan and document your layout, presenting material for global teams to review • Optimally connect with engineering teams in India, Japan the US, and other global teams to ensure the success of the layout project.

How To Qualify:

• Must have 10 + years of experience in analog layout designs in sophisticated CMOS processes.
• Should have expertise in multiple IP layout library developments.
• Knowledge of DRAM chip architecture is needed Should be able to perform IP layout development and physical verification activities for complex designs as per provided specifications.
• Should have expertise in layout area and routing optimization, design rules, yield and reliability issues.
• Good understanding of layout fundamentals i.e. Electro-migration, and Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
• Should have adequate knowledge of schematics, interface with circuit designer and CAD team.
• Understanding layout effects on the circuit such as speed, capacitance, power, and area, etc.,
• Excellent in problem-solving skills in solving area, power, performance, and physical verification of custom layouts.
• Experience with Cadence tools including Virtuoso schematic editor Virtuoso layout L, XL & Verification tools like Mentor Calibre- Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques.
• Should have leadership skills and able to do multi-tasking as required. Should be able to work in a team environment and able to guide and provide technical support to fellow team members.
• Self-motivated, hardworking, goal-oriented, and excellent verbal and written communication skills.
• Knowledge of Skill coding and layout automation is a plus.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_na@micron.com
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

• Lead junior team-members in their execution of Sub sub-block-level layouts & review their work.
• Contribute to effective project management and technical innovatio