Senior FPGA Engineer

at  VIAVI Solutions

Summary:
VIAVI (NASDAQ: VIAV) has a 100+ year history of technical innovations that have evolved to keep pace and address our customers’ most pressing business issues. We make equipment, software, and systems that help to plan, deploy, certify, monitor, and optimize all kinds of networks - like those for mobile phones, service providers, large businesses and data centers. VIAVI is also a leader in high performance thin film optical coatings and engineered diffusers, providing light management solutions to anti-counterfeiting, consumer electronics, automotive, defense and instrumentation markets.
We are the people behind the products that help keep the world connected – at home, school, work, at play, and everywhere in between. VIAVI employees are fierce about supporting customer success and we welcome people who bring their best every day to the company - to question, to collaborate and to push for solutions that will delight our customers.
As an FPGA Development Engineer, you will be responsible for developing new and maintaining existing FPGA designs and HDL components. Our designs contain numerous interfaces (memory, interconnect, IC control), signal processing functions and bit rate processing functions, primarily targeted at our 3GPP capable multi-UE simulator. You’ll get the chance to work on innovative test systems for the very latest communication technologies including 5G-Advanced and 6G.

Duties & Responsibilities:

• Designing and documenting components and interfaces.
• Implementing HDL components using VHDL.
• Developing and implementing signal processing algorithms in HDL and AMD Versal AI Engines.
• Mapping algorithms to SIMD type processor architectures.
• Architecting real-time processing solutions for modern FPGA devices.
• Developing best practices for technology reuse.
• Building and timing closing FPGAs designs.
• Debugging system issues seen on the target, determining root causes and providing solutions.
• Participate in cross team technical discussions on requirements, solutions and integration.
• Attending meetings and providing work breakdowns, estimates and progress updates.

Pre-Requisites / Skills / Experience Requirements:

• Degree level qualification in relevant Engineering discipline.
• Theoretical and practical signal processing knowledge (e.g., filtering, FFT, mixing, resampling, matrix operations, etc.).
• MATLAB programming experience.
• VHDL programming skills.
• Experience of FPGA development flow.
• Intermediate C/C++ programming capability.
• Ideally experience with code development for Versal AI Engines or GPU.
• Experience of developing real time processing systems.
• Basic experience of using FPGAs containing embedded processors.
• Experience building and timing closing large modern FPGAs designs.
• Experience with 3GPP physical layer (4G/5G).
• High attention to detail.
• We also encourage applications from DSP and communication SW engineers with strong development experience on DSP/CPU/GPU processors and an interest in broadening their experience to include FPGA design.
• Strong collaboration and team working skills, including cross-functionally, with the ability to establish and maintain effective relationships across all levels.
• Ability to influence senior stakeholders.
• Excellent communication skills, both verbal and written.
• The ability to work within multiple and/or complex projects simultaneously in a deadline-driven environment.
• Ability to mentor and coach the same or junior level.
• Ability to solve complex issues using in depth evaluation methods and technique.
• Contributes to strategic decision-making.

If you have what it takes to push boundaries and seize opportunities, apply to join our team today

• Designing and documenting components and interfaces.
• Implementing HDL components using VHDL.
• Developing and implementing signal processing algorithms in HDL and AMD Versal AI Engines.
• Mapping algorithms to SIMD type processor architectures.
• Architecting real-time processing solutions for modern FPGA devices.
• Developing best practices for technology reuse.
• Building and timing closing FPGAs designs.
• Debugging system issues seen on the target, determining root causes and providing solutions.
• Participate in cross team technical discussions on requirements, solutions and integration.
• Attending meetings and providing work breakdowns, estimates and progress updates