Senior IC SoC Hardware Integration Designer (f/m/d)

at  NXP Semiconductors

Ready to join the future of innovation in IC SoC Top-level Integration Design?
This opening is within the Microprocessor and Microcontroller Engineering (MME) SoC Implementation Organization, a central R&D Design group responsible for end-to-end IC/SoC implementation of the Automotive and Industrial Automation Processors in NXP.
The Senior Designer will be responsible for designing, integrating, and performing complex structural hardware components implementation and verification for our products like Radar for Automotive and/or Car Infotainment . This role requires a deep understanding of hardware design principles, proven experience in hardware integration, structural RTL and Gate level netlist verification, physical design implementation and the ability to mentor and guide junior team members.
International relocation can be accommodated for qualified candidates.

KEY SOFT SKILLS

• Strong problem-solving skills and attention to detail
• Excellent leadership, collaboration and teamwork skills
• Proficient skills in both written and verbal communication. Can articulate well.
• Can demonstrate emotional intelligence and ability to work well as a part of local and international teams.

EDUCATION & SENIORITY

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
• 5-12 years of proven experience in the areas of hardware design, integration and implementation.
  NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
  More information about NXP in Germany..

YOUR RESPONSIBILITIES:

• Lead different tasks in the IC SOC RTL design and integration of hardware components and subsystems.
• Define integration and implementation design strategies in collaboration with the key stakeholders (IC Architects, RTL designers, DFT engineers, Verification, etc.)
• Take key roles in the SoC hardware integration and implementation of NXP products including one or more of the following areas:
• RTL to Gate Level Netlist Synthesis
• Floor planning, Clock Tree Synthesis & Place and Route.
• Timing closure and Static Timing Analysis.
• Power and area optimization.
• Physical design verification.
• Develop and implement comprehensive structural design verification and simulations to ensure the hardware pre-Silicon models meet product requirements
• Define design integration constraints and ensure compliance
• Conduct advanced checks and troubleshooting of hardware components
• Document detailed design integration , RTL2GDS verification results, and related procedures
• Mentor and provide guidance to junior team members
• Stay informed about industry trends and emerging technologies

To be successful in this role you must have:

• Expertise in deep sub-micron CMOS process technologies.
• Proven knowledge in one or more domains of SoC Integration and Implementation (Synthesis, Floor planning, Clock Tree Synthesis, Place & Route, Timing closure & analysis, power/area optimization and physical verification)
• Proficiency in CAD tools and hardware design software ( e.g. Cadence: Genus, Conformal, Innovus, Tempus, Voltus ; Synopsys: Fusion compiler, ICC Spyglass, Primetime; Mentor : Questa )
• Able to do automation and programming. Advanced knowledge of Scripting languages. TCL, Perl and/or Python knowledge would be a plus.
• Knowledge on configuration and design data management techniques and tools (e.g. DesignSync, GIT)
• Excellent verbal and written communication skills in English