Senior/Principal Package Design Engineer
at Micron
Singapore, Southeast, Singapore -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 20 Oct, 2024 | Not Specified | 20 Jul, 2024 | 7 year(s) or above | Communication Skills,Flip Chip,Global Perspective,English | No | No |
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Description:
OUR VISION IS TO TRANSFORM HOW THE WORLD USES INFORMATION TO ENRICH LIFE FOR ALL.
Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.
JR58555 Senior/Principal Package Design Engineer
REQUIREMENTS:
- Bachelor of Science degree in Electrical Engineering or Mechanical Engineering with a minimum of 7 years of experience in semiconductor packaging industry.
- Candidates must possess a strong design knowledge of high-density (Wirebond + Flip-Chip) packaging architectures and die stack-up.
- Excellent communication skills, both oral and written in English.
- Excellent problem solving and analytic skills.
- Experience with Cadence SIP, APD and AutoCAD software tools is preferred.
- Good understanding of Silicon IP, floorplan and Signal/Power Integrity is a plus.
- Ability to work independently, prioritize and manage numerous projects with minimum supervision.
- A global perspective and the ability to work in a multicultural environment.
Responsibilities:
- Responsible the package design integration activities by working with cross-functional team and partners for package technology development, including material development, process development, DOEs, and related activities.
- Work with a cross-functional team across several geographies to create package design databases such as package stack-up, wire-bond fanout, route-study, substrate layout, wire bond/Die placement diagrams, and other design documentation.
- Work with Business Unit Package Design Lead and cross-functional team to establish a Packaging Roadmap.
- Contribute to package design rules and system development.
- Participate in packaging IP development activates and industry benchmarking.
- Work with Substrate and PCB (Printed Circuit Board) suppliers, OSATs (Outsourced Semiconductor Assembly and Test), and other ecosystem partners to meet their requirements with packaging solutions.
REQUIREMENT SUMMARY
Min:7.0Max:12.0 year(s)
Information Technology/IT
Engineering Design / R&D
Information Technology
BSc
Semiconductor packaging industry
Proficient
1
Singapore, Singapore