PLEASE NOTE:

To provide the best candidate experience with our high application volumes, we limit applications to a total of 10 over 6 months.

WHAT YOU BRING

• Bachelors with 15+ years of relevant industry experience, or Masters with 13+ years or PhD with 10+ years in Electrical Engineering, Computer Science or related field preferred.
• Solid background in mixed-signal circuit design, and in particular past experience with PLL, DLL, CDR, DFE, TX, or analog front-end (AFE/CTLE).
• Hands on experience with lab measurement and serial link characterization.
• Familiar with high-speed I/O signaling and clocking techniques.
• Excellent communication skills.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.
  

  LI-MS1

Samsung Interface Lab (SIL) is looking for a senior analog design engineer with experience in high-speed interface development for various SLSI divisions including Display, Camera, and SoC. This is a newly established and growing team within the Samsung San Jose office, in charge of taking a design from concept to production across a wide range of products.
Location: Hybrid, working onsite at our San Jose office 3 days a week, with the flexibility to work remotely the remainder of your time

Reports to: Director, Analog Design

• Architecture and design of high-speed I/O circuit blocks such as TX, PLL, CDR, Analog Front-End (AFE/CTLE), DFE.