Senior Verification Director, Interface IP

at  Synopsys

WE ARE:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

• Ultimately responsible for PCIe/CXL verification strategy and functional quality.
• Leading and managing an organization of approximately 80 R&D verification engineers focused on verifying digital IP controllers, namely PCIe/CXL, to the product line’s plan-of-record
• Ensure that the verification team capacity and team structure are setup to meet market demand. With fixed resources, help define the prioritization of asks with stakeholders and align an execution plan to achieve of plan of record.
• Adapting to methodologies that improve the quality of the controllers and productivity of the team
• Manage project scope, project schedule, project resource costs and project risk. Review project convergence metrics with team, identifying risks early and mitigate against such risk. Align with management on project resource needs and trade-offs.
• Lead verification R&D activities as required around customer pre-sales engagements and post-sales support and escalation management as pertaining to quality.