Silicon Design Engineer

at  Advanced Micro Devices Inc

PREFERRED EXPERIENCE:

• Proficient in IP level ASIC verification
• Proficient in debugging firmware and RTL code using simulation tools
• Proficient in using UVM testbenches and working in Linux and Windows environments
• Experienced with Verilog, System Verilog, C, and C++
• Developing UVM based verification frameworks and testbenches, processes and flows
• Automating workflows in a distributed compute environment.
• Strong background in the UVM concepts and SystemVerilog language
• Good knowledge in the C++ language, preferably on Linux with exposure to Windows platform
• Scripting language experience: Perl, Ruby, Makefile, shell preferred.
• Previous experience on leading a small team to execute a TP is preferred
• Desirable assets with prior exposure to ARM architecture.
• Desirable assets with prior exposure to low power design verification.

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
Responsibilities:

THE ROLE:

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s Advanced S3 IP team, resulting in no bugs in the final design.

KEY RESPONSIBILITIES:

• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
• Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
• Estimate the time required to write the new feature tests and any required changes to the test environment
• Build the directed and random verification tests
• Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
• Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements