Silicon Logical Design Engineers
at graphcore
Cambridge, England, United Kingdom -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 19 Jan, 2025 | Not Specified | 20 Oct, 2024 | N/A | Good communication skills | No | No |
Required Visa Status:
Citizen | GC |
US Citizen | Student Visa |
H1B | CPT |
OPT | H4 Spouse of H1B |
GC Green Card |
Employment Type:
Full Time | Part Time |
Permanent | Independent - 1099 |
Contract – W2 | C2H Independent |
C2H W2 | Contract – Corp 2 Corp |
Contract to Hire – Corp 2 Corp |
Description:
ABOUT GRAPHCORE
How often do you get the chance to build a technology that transforms the future of humanity?
Graphcore products have set the standard in made-for-AI compute hardware and software, gaining global attention and industry acclaim. Now we are developing the next generation of artificial intelligence compute with systems that will allow AI researchers to develop more advanced models, help scientists unlock exciting new discoveries, and power companies around the world as they put AI at the heart of their business.
Graphcore recently joined SoftBank Group – bringing large and ongoing investment from one of the world’s leading backers of innovative AI companies.
JOB SUMMARY
Working within the logical design team, the silicon logical designer is responsible for a wide range of logical design tasks working closely with other engineers within the Silicon department. This person is responsible for helping the team deliver high quality micro-architecture and RTL for Graphcore chips, working within the logical design team and the rest of the silicon teams to ensure that the silicon team can meet the company objectives for silicon delivery.
Responsibilities:
- Being part of the logical team producing high quality microarchitecture and RTL for Graphcore chips.
- Ensuring good communication between sites
- Contributing to shared design infrastructure and flows.
- Using EDA tools and the Graphcore design flow to design in cutting edge technologies
- Leading and/or contributing to final chip level checks and auditing
- Providing feedback to Physical Design, Verification and DFT teams
REQUIREMENT SUMMARY
Min:N/AMax:5.0 year(s)
Information Technology/IT
Engineering Design / R&D
Information Technology
Graduate
Proficient
1
Cambridge, United Kingdom