SOC RTL Design and Integration, Principal Engineer
at Synopsys
Dublin, County Dublin, Ireland -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 18 Jan, 2025 | Not Specified | 19 Oct, 2024 | 12 year(s) or above | Semiconductors,Rtl Design,Integration | No | No |
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Description:
At Synopsys, we are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we are powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation and System-On-Chip (SoC) Design, we want to meet you.
The Systems Solutions Group (SSG) delivers tool, methodology, architecture, design creation, design verification and physical implementation expertise to enable leading edge customers to complete their most challenging SoC design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. Our customers develop SOCs for high-performance computing, automotive, aerospace & defense, and more.
JOB DESCRIPTION AND REQUIREMENTS
The role is for SoC RTL Design and Integration of IP/Subsystem/SoC Design in the System Solutions Group (SSG). This position is based in Dublin or can be remote Ireland. As part of this role, you can expect to develop and deliver your expertise in SoC Micro-Architecture, RTL Design, Subsystem or SoC Integration while working on RTL Signoff activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality. The role will expose you to various innovative technologies deployed for Semiconductors.
Responsibilities:
- Work with Synopsys customers to understand their needs and define SoC Micro-Architecture, design scope and activities.
- Collaborate with architects, designers, and IP teams to accomplish Subsystem or SoC integration deliverables.
- Design, integrate, verify and support implementation of ARC/ARM/RISC based CPU Subsystems, Interface IP Subsystems, Interconnects and SoC Top Level Integration.
- Work with peers to improve methodologies and improve execution efficiency.
- Develop and Adhere to quality standards, process and best practices.
- Ramp-up on new tools and methodologies using Synopsys Products to enable customers.
- Work with other Synopsys teams including BU AEs and Sales to develop, broaden and deploy Tool and IP solutions.
- Deliver RTL Integration collaterals to Cross-Functional teams, like Constraint Development, Design documentation etc.
- Setup flows and methodologies to enable quick setup for SoC Integration automation.
- Lead team of engineers to perform various Design, Integration and RTL signoff activities on IPs/Subsystems/SoC Top level.
- Assist and mentor the team in day-to-day activities and grow the capabilities for future assignments.
- Review various results and reports to provide continuous feedback to the team and improve quality of deliverables.
- Report status to management and provide suggestions to resolve any issues that may impact execution.
REQUIREMENT SUMMARY
Min:12.0Max:17.0 year(s)
Information Technology/IT
Engineering Design / R&D
Information Technology
Graduate
Engineering
Proficient
1
Dublin, County Dublin, Ireland