Staff Digital Design Engineer
at Analog Devices
Kraków, małopolskie, Poland -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 29 Jan, 2025 | Not Specified | 31 Oct, 2024 | 7 year(s) or above | Communication Skills,Matlab,Coding Experience,Python,Signal Processing | No | No |
Required Visa Status:
Citizen | GC |
US Citizen | Student Visa |
H1B | CPT |
OPT | H4 Spouse of H1B |
GC Green Card |
Employment Type:
Full Time | Part Time |
Permanent | Independent - 1099 |
Contract – W2 | C2H Independent |
C2H W2 | Contract – Corp 2 Corp |
Contract to Hire – Corp 2 Corp |
Description:
ADI
) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY23 and approximately 26,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible. Learn more at
www.analog.com
and on
LinkedIn
and
Twitter (X)
Consumer Staff Digital Design Engineer
Team
The charter of ADI’s Consumer team is to lead the market in selected technology domains with highly differentiated sensing and signal processing solutions. Today these innovative and fast paced technology areas include Capacitive Sensing, Optical Image Stabilization, Ultrasound, Audio and Video that drive growth in our portable and non-portable consumer business.
As part of our global operation and rapidly expanding business needs we are now seeking to fill the key role of defining and developing digital systems. This would scan the entire development cycle from concept phase, through design, implementation and release of products to customers.
Requirements
- Bachelor’s or Master’s degree with 7+ years of progressive industry experience
- RTL coding experience is mandatory in Verilog/system Verilog.
- Ability to work well in a diverse team environment
- Strong interpersonal, teamwork and communication skills are required.
- Precise documentation and attention to detail are essential.
- Familiarity with verification and UVM is desirable.
- Familiarity with signal processing, embedded CPUs, bus fabrics, interface peripherals is desirable.
- Familiarity with Matlab, Python or other signal and data processing tools is desirable.
- Backend experience including STA is desirable
- DFT experience is preferable
Responsibilities
- Architected design and specification of blocks and platforms.
- Act as design hub to interact with stakeholders – test, application, physical implementation, verification
- FPGA implementation of design
- System and block-level digital micro-architecture specification
- Verilog/SystemVerilog RTL design
- Design to meet area, low-power, manufacturing test and timing targets.
- Intellectual Property (IP) block design and integration.
- Perform timing, power and CDC analysis on design
- Verification of blocks using UVM.
- Mixed-signal integration and verification / co-simulation
- Working with product development teams to align digital system architecture and methodologies with product roadmaps
LI-CC1
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Day
Responsibilities:
- Architected design and specification of blocks and platforms.
- Act as design hub to interact with stakeholders – test, application, physical implementation, verification
- FPGA implementation of design
- System and block-level digital micro-architecture specification
- Verilog/SystemVerilog RTL design
- Design to meet area, low-power, manufacturing test and timing targets.
- Intellectual Property (IP) block design and integration.
- Perform timing, power and CDC analysis on design
- Verification of blocks using UVM.
- Mixed-signal integration and verification / co-simulation
- Working with product development teams to align digital system architecture and methodologies with product roadmap
REQUIREMENT SUMMARY
Min:7.0Max:12.0 year(s)
Information Technology/IT
IT Software - System Programming
Information Technology
Graduate
Proficient
1
Kraków, małopolskie, Poland