System-on-Chip Performance Verification Engineer

at  Advanced Micro Devices Inc

PREFERRED EXPERIENCE:

• Proficient in IP/SoC level ASIC verification flow
• Good understanding and hands-on experience with UVM concepts and SystemVerilog language
• Experienced with C/C++
• Scripting language experience: Perl, Python
• Strong knowledge in Computer Architecture
• Exposure to IP/SoC Performance Verification and/or Modeling is an asset
• Strong knowledge in RTL Design and Architecture
• Strong leadership and mentorship skills

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
Responsibilities:

THE ROLE:

We are looking for a System-on-Chip Performance Verification Engineer who will be part of a team working on next generation of a complex SOC design of APU/GPU products for HPC/ML/AI applications.
This is a multidisciplinary function/role, working in a close collaboration with SoC/Chip leads, Architecture, SW and various design/HW teams on performance aspects of the entire chip. Our feedback is also used by HW/SW Architects to drive design and features definition for the next generation of products.

KEY RESPONSIBILITIES:

• Collaborate with architects, hardware and firmware engineers to understand the new features to be verified
• Create test plan documentation, based on use cases defined by hardware and software architects
• Build directed and random performance verification tests
• Debug test failures to determine the problem’s root cause
• Work with RTL designers and SoC/IP Architects to resolve HW and configuration related performance issues
• Analyze and review performance results with SoC/Chip leads and suggest potential solutions