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Job Description:
The successful candidate will be responsible for System level Analog Mixed Signal Verification and Power integrity for the future generations of microcontrollers and wireless products

Key Responsibilities

• Lead/Contribute Sub-system, Chip level AMS and spice simulations for SoCs.
• Closely interact with SoC design, Architect and Analog design teams.
• Review and understand SoC specifications and IO Manager.
• AMS and spice simulations planning and review with SoC teams.
• PI/SI simulations including Die Pad ring, package, and PCB models.
• Lead/Contribute development of PISI, AMS simulation methodologies/flows.

Requirements/Qualifications:

• Bachelor/Master’s degree in EE or equivalent with 12+ years of experience.
• Experience with Sub-system, Chip level AMS and spice simulations.
• Good understanding of analog IPs Buck, LDO, ADC/DAC, PLL, BG etc.
• Simulation experience using Cadence, Questa ADMS, Spectre, HSPICE, or equivalent tools.
• Experience in debugging silicon issues.
• Review and understand chip level electrical specifications and requirements
• Strong communication skills and ability to collaborate in a global team is essential

Preferred

• Experience in spice simulations and circuit level debug is a plus.
• Experience in SI/PI simulations.
• Experience with IO functionality, Ethernet, DDR, etc. is a plus.

LI-PF1

Travel Time:
0% - 25

• Lead/Contribute Sub-system, Chip level AMS and spice simulations for SoCs.
• Closely interact with SoC design, Architect and Analog design teams.
• Review and understand SoC specifications and IO Manager.
• AMS and spice simulations planning and review with SoC teams.
• PI/SI simulations including Die Pad ring, package, and PCB models.
• Lead/Contribute development of PISI, AMS simulation methodologies/flows