Test & Validation Engineering, Staff Engineer

at  Synopsys

Develop, debug and optimize ATE test programs for NVM/OTP embedded memories and related IP blocks (analog/power supplies, programming controllers, access ports/wrappers, BIST). Define and implement test hardware and software components for test chip silicon projects. Work with a cross-functional team to create test reports for validation, characterization, and qualification of NVM/OTP IP products.

• Create test plans and develop ATE test programs/software
• Develop test coverage for critical device functions and parameters; understand DC and AC specifications and test limit guard-banding methods
• Investigate functional and reliability issues; follow up silicon performance concerns, and help drive F/A projects to root cause
• Review NVM/OTP IP designs for testability; advise on DFT improvements, feedback test related improvements to Design
• Specify and supervise the design of ATE and burn-in boards
• Develop scripts to automate work flows and perform statistical summaries of test data; create graphs, performance/reliability models, and silicon test reports

KEY QUALIFICATIONS

• BS/MS degree in EE (preferred), CS or related field
• 5-10 years hands-on experience in semiconductor product/test engineering (NVM preferred)
• Strong written and oral communication skills; proven team player who can work with cross-functional teams
• Knowledge of memory fault models and required test methods for detection
• Experience with memory ATE testers (Credence Kalos 2 preferred), automated handlers, oscilloscopes, micro-probing and other semiconductor lab equipment
• Experience with programming languages (C, Python, Perl); experience with memory pattern algorithm code for ATE MTO/ALPG hardware

Please refer the Job description for details