Wireless Design Verification Engineer

at  Apple

Cupertino, California, USA -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate19 Nov, 2024USD 88 Hourly22 Aug, 2024N/ASystemverilog,Python,Languages,Bash,Perl,Scripting,Communication SkillsNoNo
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Description:

SUMMARY

Posted: Jul 11, 2023
Role Number:200488126
Apple’s growing wireless silicon development team is developing the next generation of wireless silicon! In this role, you’ll be responsible for ASIC pre-silicon verification of extremely complex high throughput communication systems. You will develop leading-edge testbenches, enhance advanced methodologies, develop verification plans, debug functional tests, and utilize coverage analytics. You will be in the center of the organization impacting and influencing many cross-functional teams.

DESCRIPTION

This role will provide the opportunity to develop testbenches and create directed / constrained random tests, simulate, and debug. There will be regression triaging, along with analyzing coverage, improve flows and run RTL and gate-level functional simulations. You’ll also work closely with the design teams to review specifications and architecture, extract features, define verification plan & coverage model

KEY QUALIFICATIONS

  • Knowledge of ASIC verification simulation and testbench development flows with SystemVerilog and UVM
  • Experience with constrained random testing, coverage closure, and RTL / gate simulations
  • Experience with scripting in languages such as Python, Perl, Bash or similar
  • Experience with communication / networking chips is a plus
  • Phenomenal teammate with excellent communication skills and the desire to seek diverse challenges

EDUCATION & EXPERIENCE

Bachelors required.

Responsibilities:

Please refer the Job description for details


REQUIREMENT SUMMARY

Min:N/AMax:5.0 year(s)

Information Technology/IT

IT Software - Other

Information Technology

Graduate

Proficient

1

Cupertino, CA, USA