JOB DESCRIPTION

Designs, develops, and builds analog circuits/Components in advanced process nodes for analog and mixed signal IPs. Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models. Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results. Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals. Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues. Optimizes performance, power, area, and reduces leakage of circuits. Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities.

DesignEnablement

QUALIFICATIONS

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Candidate must possess a MS degree with 4+ years of experience or Ph.D. with 2+ years of experience in electrical engineering, applied physics, or related fields .

2+ years of experience in the following:

• Must have two or more of the following: Physical or circuit design, device physics, power/signal integrity, and/or tool flow method (TFM).
• EDA solutions for layout and schematic design and optimization.
• Must have two or more of the following: Large-scale data mining, HF / RF technique, method and tool, semiconductor processes, silicon to simulation validation, TCAD modeling, extraction, reliability, process-design-kit (PDK) and foundry operations.

Preferred Qualifications:

Experience in the following:

• Thorough knowledge of statistics, numerical analysis, and mathematical modeling; proficient with coding skills in one of modern programming and scripting languages.
• Technical Project Management, working knowledge of Intel or other foundry Process Design Kits, Design rule, DRC/LVS and debug of such runsets.

Please refer the Job description for details