ASIC Digital Design R&D Infrastructure Engineer
at Synopsys
Dublin, County Dublin, Ireland -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 16 Jul, 2024 | Not Specified | 17 Apr, 2024 | 2 year(s) or above | Software,It,Ethernet,Server Farms,Linux,Color,Python,Bash,Perforce,Usb,Artificial Intelligence,Communication Skills,Development Tools,Gnu,Interfaces,Pcie,Processors,Security,Systemverilog,Customer Applications,Design,Scripting Languages | No | No |
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Description:
JOB DESCRIPTION AND REQUIREMENTS
We’re looking for an ASIC Digital Design R&D Engineer with a keen interest in design automation.
You will join our DesignWare R&D team responsible for developing the DDR Controller IP cores used in end-customer applications such as server farms, artificial intelligence, automotive, etc.
Responsibilities:
- Design, deploy, maintain, and support IP development tools used internally by Synopsys IP developers and also in part by external customers of Synopsys
- Integrate Synopsys state-of-the-art tools in the product workflow
- Build synergies with the infrastructure team to ensure a fair access to shared resources
- Take part to internal forums contributing to the development of methodologies and best practices
Key Qualifications
- BS/MS degree with a minimum of 2 years of related experience.
- Proficient in scripting languages (Python, Tcl Perl, unix shell)
- Familiar with RTL best design practices with SystemVerilog
- Familiar with implementation and verification front end flows
- Experience with Perforce or any other code revision control systems
- Strong communication skills
Preferred Experience
- Previous experience with reusable and configurable designs
- Software design best practices
- Experience with on-chip communication protocols like AMBA a plus
- Experience with layered protocols like PCIe, USB, or Ethernet a plus
- Knowledge of Linux, BASH and GNU Make
- Understanding of configuration management (specifically Perforce)
- Experience with EDA tools and/or HDL design languages is a plus.
Soft skills:
- Team player with positive outlook and “can do” attitude
- Work autonomously and drive results and innovation
- Good written and oral communication skills
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
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Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Responsibilities:
- Design, deploy, maintain, and support IP development tools used internally by Synopsys IP developers and also in part by external customers of Synopsys
- Integrate Synopsys state-of-the-art tools in the product workflow
- Build synergies with the infrastructure team to ensure a fair access to shared resources
- Take part to internal forums contributing to the development of methodologies and best practice
REQUIREMENT SUMMARY
Min:2.0Max:7.0 year(s)
Information Technology/IT
IT Software - System Programming
Information Technology
Graduate
Proficient
1
Dublin, County Dublin, Ireland