Design Engineer - Specialized (CAN)

at  LanceSoft Inc

2/15 UPDATE: Canadian citizenship or PR required based on export control requirements
Bill rate range: * - */hr
Location: Markham (work onsite)
Duration: From Q2 24 to the end of Q2 25, roughly 15 months
TITLE: Physical Design Engineer

PREFERRED EXPERIENCE:

" Preferred 5+ years or more years of experience in physical design in digital ASIC chips
" Strong PnR, STA, IR/EM, PV knowledge/experience
" Be familiar with physical design power optimization methodologies, (eg. Clock-gating, power-gating, activity aware PnR, power friendly floorplan, DVFS, multibit re-banking de-banking, scan path power, etc.) is a plus
" Expertise in Back-End (physical design) EDA tools, especially the power calculation/optimization tools, PTPX
" Strong flow develop and custom script develop ability
" Successfully gone through several complete product development cycles
" Works well with cross-functional teams
" Good communication skills, strong interpersonal skills and the flexibility

THE ROLE:

Physical Design s Power Optimization is critical hot topic in IC Physical design. In this position, you will work with global physical design team for AMD AI accelerator/GPU/APU chips physical design power optimization/reduction. Focus on physical design methodologies implementation to improve chip power consumption, from Synthesize to place & route. The individual is expected to be an expert in digital physical design, it is a plus to have strong ability in Front-End or RTL coding experience or Synthesis. The individual is expected to know back-end physical design very well.

KEY RESPONSIBILITIES:

" Implement state-of-art physical design power optimization methodologies into SOC project
" Maintain and enhance the power optimization methodologies in physical design flow
" Closely collaborate with SOC project design team, help/support/drive them to adopt the physical design power optimization methodology