Design Verification Engineer
at Advanced Micro Devices Inc
Markham, ON, Canada -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 28 Jul, 2024 | Not Specified | 01 May, 2024 | N/A | Verilog,Pcie | No | No |
Required Visa Status:
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US Citizen | Student Visa |
H1B | CPT |
OPT | H4 Spouse of H1B |
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Employment Type:
Full Time | Part Time |
Permanent | Independent - 1099 |
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Contract to Hire – Corp 2 Corp |
Description:
PREFERRED EXPERIENCE:
- Good at C/C++, Verilog
- Familiarity with SystemVerilog and modern verification methodologies like UVM
- Experience/Background on PCIe/CXL and High Speed IO standards is a benefit
Responsibilities:
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
Responsibilities:
THE ROLE:
We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
KEY RESPONSIBILITIES:
- Develop/Maintain tests for High speed IO functional verification at the SOC level for AI and Machine Learning Supercomputers.
- Build testbench components to support the next generation AI Supercomputer
- Maintain or improve current test suites and libraries to support IP level testing at SOC subsystems level
- Create testbench models to build tehe verification architecture and verify the High Speed IO IP eco system functional correctness at SOC level
- Provide technical support to internal SOC teams
REQUIREMENT SUMMARY
Min:N/AMax:5.0 year(s)
Information Technology/IT
Engineering Design / R&D
Information Technology
Graduate
Engineering
Proficient
1
Markham, ON, Canada