Engineer I - Emulation

at  Microchip Technology

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our
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; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over
30 years of quarterly profitability
without a great team dedicated to empowering innovation. People like you.
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Job Description:
The Architecture Co-Verification team (ACOV) is an exciting, fast-paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SoC) devices using industry-leading HW emulators (such as Cadence Palladium) and FPGA based prototyping platforms (such as Cadence Protium). The team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW co-development, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations. As an emulation Engineer, you will be working closely with architects, hardware designers, firmware engineers, and verification teams throughout the SoC development process.
This is a role for a versatile engineer that enjoys the challenges of HW/FW co-development and system-level co-verification using leading-edge HW emulators and FPGA platforms. It’s a high-visibility role that will develop a wide range of skills and exceptional problem-solving abilities.

Responsibilities could include but are not limited to the following:

• Porting SoC RTL to industry-leading HW emulators and FPGA platforms.
• Developing emulation specific HW for pre-silicon subsystem/system level co-verification.
• Developing a common test ecosystem across pre/post-silicon.
• Developing FW/Tests for pre-silicon subsystem/system level co-verification.
• Troubleshoot and resolve complex problems in embedded multi-core real-time systems executing co-verification test plans.
• Utilizing state of the art logic analysis and protocol analyzers.
• Utilization of test and defect tracking tools to document and report on verification progress and product quality.
• Effectively present technical information to small teams of engineers.

Requirements/Qualifications:

• BS/MS in Electrical/Electronic Engineering or Computer Engineering.
• Excellent analytical and documentation skills.
• Strong problem solving, communication and interpersonal skills are required.
• Willing to learn in a fast-paced environment, being a self-starter, and organized.
• Strong programming and scripting skills with languages such as C, Python, Tcl, Bash, C shell.
• Highly motivated team player who sets personal goals and achieves those goals with minimal supervision.

Desirable

• Experience with validation or verification of protocols such as PCIe, CXL, SAS/SATA and NVMe.
• Experience in memory technologies like DDR4/DDR5.
• Familiarity in C/C++ embedded FW development.
• Understanding of digital design, RTL coding, simulation and debug.
• Knowledge of MIPS, ARM and RISC-V CPUs architecture.
• Experience troubleshooting server system hardware and networking infrastructure to root cause issues.
• Familiarity with Front-End design and implementation.
• Knowledge of source control systems such as subversion and/or Git.
• Experience with FPGA-based verification/emulation.
• Experience with Computer System I/O hierarchies and interconnects (I2C, SPI/ eJTAG), specifically with PCIe protocols and infrastructure.
• Experience with test automation, testing methodologies, and test tools.
• Experience working in Linux and Windows Environments and file system structure .

Travel Time:
0% - 25%
Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:
Benefits of working at Microchip

The annual base salary range for this position is $76,000-$114,000.*

• Range is dependent on numerous factors including job location, skills and experience.

• Porting SoC RTL to industry-leading HW emulators and FPGA platforms.
• Developing emulation specific HW for pre-silicon subsystem/system level co-verification.
• Developing a common test ecosystem across pre/post-silicon.
• Developing FW/Tests for pre-silicon subsystem/system level co-verification.
• Troubleshoot and resolve complex problems in embedded multi-core real-time systems executing co-verification test plans.
• Utilizing state of the art logic analysis and protocol analyzers.
• Utilization of test and defect tracking tools to document and report on verification progress and product quality.
• Effectively present technical information to small teams of engineers