Engineer Integration & Yield (YDD)
at GLOBALFOUNDRIES
Singapore, Southeast, Singapore -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 17 Aug, 2024 | Not Specified | 18 May, 2024 | 1 year(s) or above | Good communication skills | No | No |
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Description:
INTRODUCTION TO GLOBALFOUNDRIES
GlobalFoundries (GF) is one of the world’s leading semiconductor foundries and the only one with a truly global footprint spanning three continents. We manufacture complex, feature-rich integrated circuits that enable billions of electronic devices. At GF, we make things that matter — from the solutions that enable the way we live today, to the technologies that drive what’s possible for tomorrow. Join us in changing the industry that is changing the world. For more information, visit www.gf.com.
WHY GF
Be a part of our global team that is at the forefront of providing cutting-edge global technology solutions. We are seeking candidates with a strong passion for new technologies and advanced manufacturing, as we continue our Industry 4.0 Digitalization journey using technologies such as Artificial Intelligence and Machine Learning, robotics, big data analytics and more.
Your work will have a direct impact in our expanding Fab Operations, in building out our platforms of purpose-built technologies such as smart mobile devices, personal computing, home and industrial IoT, automotive and more. You will have access to the latest technological developments at GF Labs, with opportunities for patent submissions, presenting your ideas on a global platform, and enjoy GF-wide collaboration across our fabs and offices around the world.
Responsibilities:
WHY THIS ROLE
As the ideal candidate, you will leverage your analytical and problem-solving skills and play a vital role to fuel our growth. Your role will span across existing and new Fabs, improving processes and thereby wafer yields, increasing manufacturing productivity that are key to achieving Fab excellence. Coaching Associate Engineers (AEs) will also be part of your job responsibilities.
WHAT YOU WILL DO
- Liaise with module engineers on yield performance analysis
- Drive for defect reduction and yield improvement activities
- Supervise YDD Associate Engineers and wafer tech operators to ensure smooth 24/7 inline shift operation
- Train and certify D0 Associate Engineers on recipe creation and defect source knowledge
- Maintain and enhance internal SOP/ CAS and Involve in internal / external audit
- Operate FIB/SEM/EDX for inline failure analysis
- Operate and create recipes in Brightfield, Darkfield and other YDD tools
- Maintain and housekeep Brightfield, Darkfield and recipes of other YDD tools
- Perform partition analysis on defect source and detailed reports on issues
- Build and develop defect source library and tool’s defect source fingerprinting
- Track inline defect performance by layer/process tool/chamber on weekly basis
- Perform killer ratio analysis
- Perform defect characterization by process tools
- Continuous improvement activities on defect reductions with Modules/ vendors/ equipment team
- Liaise with process engineers in different modules to troubleshoot for inline defects and defect reduction activities
- Provide scan support in low yield investigation & co-work with PI/YE/PE on technology & device specific yield enhancement activities
- Automate daily activities to improve trouble-shooting speed of the team
- Responsible for wafer quality to conform to product requirements and have the authority to stop shipment and stop production to correct quality problems.
REQUIREMENT SUMMARY
Min:1.0Max:2.0 year(s)
Electrical/Electronic Manufacturing
Engineering Design / R&D
Electrical
Graduate
Electrical electronics engineering or equivalent
Proficient
1
Singapore, Singapore