ISCP Structural and Physical Design (Experience)
at Intel
Kulim, Kedah, Malaysia -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 07 Jul, 2024 | Not Specified | 09 Apr, 2024 | N/A | Scripting Languages | No | No |
Required Visa Status:
Citizen | GC |
US Citizen | Student Visa |
H1B | CPT |
OPT | H4 Spouse of H1B |
GC Green Card |
Employment Type:
Full Time | Part Time |
Permanent | Independent - 1099 |
Contract – W2 | C2H Independent |
C2H W2 | Contract – Corp 2 Corp |
Contract to Hire – Corp 2 Corp |
Description:
JOB DESCRIPTION
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve productlevel parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.
QUALIFICATIONS
Bachelor of Science degree in Electrical Engineering and/or Engineering or a related field with more than 10 years of experience In depth exposure to VLSI structural physical design methodology flows and relevant EDA tools Proficient in scripting languages such as UNIX Perl TCL and knowledge of hardware description languages of VHDL Verilog Proven track record of results and execution in a tight schedule environment
Responsibilities:
Please refer the Job description for details
REQUIREMENT SUMMARY
Min:N/AMax:5.0 year(s)
Electrical/Electronic Manufacturing
Engineering Design / R&D
Other
BSc
A tight schedule environment
Proficient
1
Kulim, Malaysia