Junior FPGA Design Engineer
at Space Dynamics Laboratory
North Logan, UT 84341, USA -
Start Date | Expiry Date | Salary | Posted On | Experience | Skills | Telecommute | Sponsor Visa |
---|---|---|---|---|---|---|---|
Immediate | 13 Jun, 2024 | Not Specified | 14 Mar, 2024 | N/A | Static Timing Analysis,Analog Circuits,Computer Engineering,Embedded Software,Testing,Nasa,Closure,Ground Support Equipment | No | No |
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Description:
JOB ID 17762
SDL supports a variety of missions, including NASA’s vision to reveal the unknown for the benefit of humankind and the Department of Defense’s aim to protect our Nation on the ground, in the air, and in space. Our sensors, satellites, software systems, and science and engineering play an essential role in some important missions you’ve heard of, and others that you haven’t. Join our team in our seventh decade of delivering mission success.
The Space Dynamics Laboratory (SDL) is in search of a junior FPGA design engineer to assist with the design, fabrication, test and support of electronics for telecommunication hardware for space vehicles and sensor payloads. The selected candidate will be involved in all aspects of payload algorithm discernment, development, optimization, and testing. The selected candidate must be able to work as part of larger electronics teams, internal and external to the organization, and own all aspects of their assigned block of the design from concept to integration and test. This position is full time and is located in Logan, UT.
Responsibilities:
Please refer the Job description for details
REQUIREMENT SUMMARY
Min:N/AMax:5.0 year(s)
Electrical/Electronic Manufacturing
Engineering Design / R&D
Other
BSc
Proficient
1
North Logan, UT 84341, USA