JOB DESCRIPTION

At Intel, Design Enablement (DE) is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your will directly drive and work with DE cross teams to ensure design-kits leadership for customer enablement for cutting edge technologies. You will work with customers to outline critical requirements, collaborate with Intel internal partners to define the scope, plan execution, innovate competitive solutions to meets customer needs.
This support role will drive the solutions for Physical Verification when customers use Intel PDK. You will lead the collaboration and communication across TD/DE organizations to find the best path to resolve the issue. Tasks also include owning/maintaining training documents, user guide, and customer ticket support.
As a DEAS (Design Enablement Application and Support) key member, you will need to have good communication skills to interact with customers directly, apply analytical problem-solving capability to identify the key requests, root-causing the issue, and do teamwork with DE stakeholders to support and enable customer success.

DesignEnablement

QUALIFICATIONS

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Candidate must possess a BS degree with 6+ years of experience or MS degree with 4+ years of experience or PhD degree with 2+ years of experience in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering or a related field.

6+ years of experience in 2 or more of the following areas:

• Physical layout verification knowledge in Synopsys IC Verification, Siemens/Mentor Calibre.
• Resolving DRC/LVS/density issues.
• Process layout design rule from DRM (Design Rule Manuals).
• Silicon process technology development and related process design kits (PDKs).

Preferred Qualifications:
10+ years of experience in Intel and/or external foundry process technology knowledge in advance nodes.

Please refer the Job description for details