PMU RTL/ Digital Design Engineer

at  Apple

SUMMARY

Posted: 14 Sep 2023
Role Number:200503318
At Apple, we work every single day to craft products that enrich people’s lives. The people here at Apple don’t just build products - they create the kind of wonder that revolutionizes entire industries. We invite you to join our dynamic group, for the unique and rewarding opportunity to contribute to upcoming products that will delight and inspire millions of Apple’s customers every day! Apple’s PMU Hardware Tech team are responsible for delivering the power in a highly configurable and controlled way to the high end Apple SoCs, which power everything from Apple Watch, AirPods, and Apple TV to iPhone, iPad, Mac and Vision Pro. We have unique and exciting career opportunities for talented engineers interested in applying, and further developing their knowledge designing Apple’s cutting-edge power management chips. We are looking for a Digital Design Engineer with the talent, ambition and passion, to innovate the way we design our next generation of power management silicon, to provide industry leading power efficiency, achieve customer expectations of device performance, battery efficiency, and welcome you to work among the industry’s best. You will be part of a highly experienced team, delivering PMU silicon directly into next generation Apple products, working alongside our design verification, SoC platform architecture, and physical design teams.

KEY QUALIFICATIONS

Key Qualifications

• Previous complex IP design experience is required
• Fluency with RTL System Verilog syntax and hardware modelling
• Deep understanding of implementing modern design techniques
• Hands on experience with energy-efficient/low-power logic design
• Well-versed in logic optimisation, synthesis, timing analysis
• An understanding of finite state machines, CPU/ARM bus architectures
• An understanding of mixed signal circuits, asynchronous design and considerations
• Familiarity with logic simulation, debug environments and formal verification
• An understanding of design with DFT in mind
• Experience working on PMUs is desirable but not required
• Experience of FPGAs and/or physical design flows is desirable but not required
• Ability to work well in a team and be productive under tight schedules
• Excellent communications skills, self-motivated and well-organised

• Strong analytical/problem solving skillsFluency in English is required

DESCRIPTION

Description
You will work within the Digital Design Team, creating requirements and specifications, collaborating with analog design, digital/mixed signal verification, architecture and the physical design teams. You will be responsible for IP block ownership and also have the opportunity for chip level responsibility. You will implement designs, ensuring alignment with analog control and performance expectations, balancing energy efficiency, performance and area constraints with project schedule, maintainability and coding guidelines. You will review synthesis and power reports, root-cause and resolve timing and power issues, and ensure maximal QoR throughout your design. As your design approaches functional completion, you will work closely with the verification team, to ensure the design behaves as intended. Once the chip is integrated into the system, you may be simulating and debugging issues with the wider development and validation teams.

EDUCATION & EXPERIENCE

Education & Experience
BS/MS/PhD in Electrical Engineering, Computer Engineering or equivalent field is required

ADDITIONAL REQUIREMENTS

Additional Requirements

• Some international travel required.
• Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

Please refer the Job description for details