Principal Engineer/MTS/SMTS - NVE PE

at  Micron

OUR VISION IS TO TRANSFORM HOW THE WORLD USES INFORMATION TO ENRICH LIFE FOR ALL.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.
JR52748 Principal Engineer/MTS/SMTS - NVE PE
As a Non-Volatile Engineering (NVE) Product Engineer at Micron Technology, Inc., you will be part of the team driving effort to accelerate NAND development learning cycles to achieve best in class cycle time from first silicon to qualified system. You will be engaged in developing, validating, characterizing, and qualifying Micron’s next generation 3D NAND memory products to power our customers’ innovation. The future of non-volatile memory and the systems that utilize the advanced technology will continue to be exciting and dynamic. Micron is seeking experienced individuals that find technical challenges engaging and invigorating.

Responsibilities include, but not limited to:

• Innovate new DFT solutions to reduce the DPM, Test time, yield hit, cycle time for qualification.
• Partner with Design Engineering team in Testmode development and innovations.
• Own Testmodes Definition to ensure all testing requirements are fulfilled. Drive testmode validation process in pre-silicon and post-silicon phase in collaboration with other PE teams. First responders to Silicon DFT related issues, driving silicon debug and experiments to come up with the most practical solution.
• Enable best-in-class production testing capabilities and test time efficiencies for cost reductions.
• Lead efforts from PE side to reduce the die size
• Enable faster development of production DIDs by providing learnings from the spider chips.
• Engage with System teams on innovation and solutions for defect management, improving yield and cycle time for qualification.
• Lead staging and strategy on future nodes to achieve best in class Design and System solutions to improve yield, quality, and test time.
• Employ analytical skills for high volume data analysis

As a team lead

• Guide , mentor, support all the reports with technical expertise.
• Provide them direction for enablement of solutions.
• Delegate work to the reports and monitor overall project status.

• Innovate new DFT solutions to reduce the DPM, Test time, yield hit, cycle time for qualification.
• Partner with Design Engineering team in Testmode development and innovations.
• Own Testmodes Definition to ensure all testing requirements are fulfilled. Drive testmode validation process in pre-silicon and post-silicon phase in collaboration with other PE teams. First responders to Silicon DFT related issues, driving silicon debug and experiments to come up with the most practical solution.
• Enable best-in-class production testing capabilities and test time efficiencies for cost reductions.
• Lead efforts from PE side to reduce the die size
• Enable faster development of production DIDs by providing learnings from the spider chips.
• Engage with System teams on innovation and solutions for defect management, improving yield and cycle time for qualification.
• Lead staging and strategy on future nodes to achieve best in class Design and System solutions to improve yield, quality, and test time.
• Employ analytical skills for high volume data analysi