Senior Analog Design Engineer

at  Synopsys

JOB DESCRIPTION AND REQUIREMENTS

In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed (>200Gbps) analog integrated circuits in the latest FinFET process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team. Our Interface IP group in Mississauga, ON is looking for an enthusiastic person to join our team. You will be working with a cross functional team of analog and mixed signal circuit designers from a wide variety of backgrounds on design and methodology. This position requires sound technical experience in full custom analog/mixed-signal circuit design, custom layout, circuit simulations, reliability investigation, post-silicon characterization and a deep understanding of silicon IP design requirements with the ability to drive and train junior engineers to become experts with new methodologies.

Job Responsibilities

• Review SerDes standards to develop analog top and sub-block specifications.
• Ability to drive projects and guide junior engineers.
• Exercise independent judgement to identify and refine circuit architectures to achieve optimal power, area and performance targets.
• Propose design and verification strategies that efficiently use simulator features to ensure highest quality design.
• Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
• Review and present simulation data for peer and customer review.
• Define and document design features and test plans.
• Propose solutions for post-silicon design updates.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or similar technical field
• BSEE degree and 3+ years of experience in IC design, or MSEE (or PhD) with 1+ years of experience.
• Design experience in high speed PHY
• In depth familiarity with transistor level circuit design - sound CMOS design fundamentals
• Design experience with one, and familiarity with several other SerDes sub-circuits:
• receive equalizers,
• samplers,
• voltage/current-mode drivers,
• serializers, deserializers,
• voltage-controlled oscillator,
• phase mixer,
• delay-locked loop, phase locked loop,
• bandgap reference,

• Review SerDes standards to develop analog top and sub-block specifications.
• Ability to drive projects and guide junior engineers.
• Exercise independent judgement to identify and refine circuit architectures to achieve optimal power, area and performance targets.
• Propose design and verification strategies that efficiently use simulator features to ensure highest quality design.
• Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
• Review and present simulation data for peer and customer review.
• Define and document design features and test plans.
• Propose solutions for post-silicon design updates