Senior Software Engineer

at  Intel

WHO WE ARE

We’re part of Server Silicon Validation org within Design Engineering Group and looking for motivated, passionate, talented engineers to join our Server Debug Enabling and Solutions team - who are responsible for providing debug tools and solutions for Si debug and validation of DFX features required for Pre-Si and Post-Si debug. We’re a strong, vibrant cross-site team.

QUALIFICATIONS

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

MINIMUM QUALIFICATIONS:

Candidate must possess a Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 6+ years’ experience -OR- a Master’s degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 4+ years’ experience -OR- PhD degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 2+ years’ experience.

Candidate should possess experience in 3 or more of the following areas:

• Technical leadership and strong experience in CPU debug and/or DFD validation.
• Experience working closely with Design teams, Pre-Silicon validation (Emulation and FPGA), Software architects.
• Candidate must possess expertise in Python scripting and/or Object oriented programming (C++ and/or Java) .
• Knowledge of Intel Architecture x86.
• Working experience in Pre-Si environments like Emulation, HFPGA is preferred.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

• Drives end2end debug enabling strategy for a given tool at Silicon and System level.
• Engages and works closely with IP engineering, SOC engineering and Software Engineering teams of Xeon products from pre-silicon (HFPGA, Emulation) to Post Silicon.
• Consults with DFX architecture teams about new and delta DFD feature impact on debug tools and works with them to define solutions.
• Drives detailed technical readiness for debug enabling solutions for a Xeon platform, identifies gaps/risks and leads various partners teams for resolving them.
• Defines collateral requirements, Spec formats and validation checkers for the debug tool and influences Xeon design teams towards implementation.
• Maps user and stakeholders debug strategy to define debug tool requirements and develop detailed debug enabling feature list for a platform.
• Drives continuous improvement across development, validation and customer support.
• Engages as necessary on critical debug or cross divisional TFs from pre-silicon to launch to provide debug enabling solutions.
• Collaborates with business units on Debug, Validation, Quality, TTM initiatives and workgroups.
• Shares responsibility to develop and strengthen technical leaders across the organization