Staff Analog/RF Layout Engineer

at  Qorvo

STAFF ANALOG/RF LAYOUT ENGINEER

Experience Level: Individual Contributor
Job Type: Full-Time
Location:Ireland - Dublin, IE
Requisition ID: 7492
Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers’ most complex technical challenges. Qorvo serves diverse high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our diverse and innovative team is helping connect, protect and power our planet.

SUMMARY

As Staff ASIC Layout Design Engineer, you will work as part of a cross-functional team to deliver the next generation UWB products from concept to volume production.

Qualifications

• Minimum of Bachelor’s degree in Electronic Engineering or related field
• 10+ years relevant industrial experience required
• Excellent working knowledge of the Cadence Virtuoso suite and Calibre verification tools
• Detailed experience of analog/mixed-signal layout on advanced CMOS nodes (40nm and lower)
• Must understand issues of LDE, isolation, matching, parasitic effects, EM and IR drop
• Verification checks (DRC/LVS)
• Strong analytical and debug skills
• Experience with high frequency RF designs
• Experience writing Skill code a plu

Layout Design & Verification

• Work with Analog/RF Design Engineers to create and optimise the design and layout of complex RF and mixed signal blocks
• Produce highest quality RF/Analog systems using industry best practice methods for layout and physical verification
• Block level ownership as well as full top-level floor planning
• Detailed verification and debug from block level to top level
• Lead and document layout design reviews

Interpersonal

• Work together with other engineers in the RF/Analog design team to ensure designs are delivered to specifications and on time
• Good team player but can work independently on complex tasks
• Mentor junior layout engineer and guide layout contractors
• Help drive continuous productivity improvements through improved work methodologies, efficient tool use and good documentation

Qualifications

• Minimum of Bachelor’s degree in Electronic Engineering or related field
• 10+ years relevant industrial experience required
• Excellent working knowledge of the Cadence Virtuoso suite and Calibre verification tools
• Detailed experience of analog/mixed-signal layout on advanced CMOS nodes (40nm and lower)
• Must understand issues of LDE, isolation, matching, parasitic effects, EM and IR drop
• Verification checks (DRC/LVS)
• Strong analytical and debug skills
• Experience with high frequency RF designs
• Experience writing Skill code a plus