Synthesis and timing analysis engineer

at  Nordic Semiconductor

Tampere, Länsi-Suomi, Finland -

Start DateExpiry DateSalaryPosted OnExperienceSkillsTelecommuteSponsor Visa
Immediate14 Sep, 2024Not Specified15 Jun, 2024N/AContinuous Improvement,English,Synthesis,Python,Communication Skills,Interpersonal Skills,Perl,Tcl,Scripting LanguagesNoNo
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Description:

ABOUT THE JOB

Join Nordic Semiconductor during an exciting period of growth and innovation! We are seeking a talented and experienced Synthesis and Timing Analysis Engineer to join our Cellular IoT department’s Digital Group. As a member of Nordic’s CSSC team, you will be instrumental in running block and SoC level synthesis, performing timing analysis for layout iterations, and implementing timing corrections.

KEY QUALIFICATIONS

  • BSc/MSc in Electronics Engineering or a related field.
  • Experience or academic knowledge of EDA IC design and verification tools.
  • Proficiency in synthesis, timing analysis, logic equivalence check, or low power static check.
  • Familiarity with scripting languages such as TCL, Perl, Python, or similar.Excellent written and verbal communication skills in English.
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PERSONAL SKILLS

We are looking for a collaborative team player with strong interpersonal skills and the ability to work independently. Curiosity, a willingness to experiment, and a commitment to continuous improvement are essential. You should thrive in a dynamic environment with shifting priorities, managing tasks effectively while aiming for excellence in your performance.

How To Apply:

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Responsibilities:

  • Execute synthesis for block and SoC level.
  • Conduct timing analysis for layout iterations and make necessary timing corrections.
  • Utilize static checking tools.Collaborate closely with the DFT team to ensure testability and with the physical design team to achieve timing closure.
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REQUIREMENT SUMMARY

Min:N/AMax:5.0 year(s)

Information Technology/IT

Engineering Design / R&D

Software Engineering

Graduate

Proficient

1

Tampere, Finland